1. Field of the Invention
The invention relates to memories made in integrated circuit form. The invention relates more particularly, but not exclusively, to non-volatile electrically erasable and programmable memories (EEPROMs and flash EPROMS).
2. Description of the Prior Art
One of the important factors in the use of integrated circuit memories is the speed of access to the information contained in the memory cells. Now, a great many factors tend to limit this speed, especially in memories having high storage capacity (of one megabit or more).
There is a known way of using a bit line precharging operation before the reading phase. The bit line to which a column of memory cells is connected is precharged at an intermediate voltage between a high logic level and a low logic level, before the reading phase itself. The reading amplifier that is connected between this bit line and a reference line will switch over in one direction or the other depending on the state of the cell to be read.
An aim of the invention is to improve the speed of transmission of the information at the output of the memories.
According to the invention, it is proposed to precharge, at an intermediate value between a high logic level and a low logic level, the output pad or pads of the integrated circuit chip, on which the logic information elements contained in the memory appear.
It has indeed been observed that one factor in the slowing down of the access to the information could be a result of what happens outside the memory (for example the existence of a high capacitive charge connected externally to the memory), and that this slowing down process can be partially compensated for by steps taken within the memory chip.